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Commit 24043720 authored by Matt Wala's avatar Matt Wala
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Move unported exampels to unported-examples

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with 4 additions and 11 deletions
# This file tells py.test to scan for test_xxx() functions in
# any file below here, not just those named test_xxxx.py.
def pytest_collect_file(path, parent):
if "grudge/examples" in str(path.dirpath()) and path.ext == ".py":
return parent.Module(path, parent=parent)
...@@ -35,7 +35,7 @@ def main(write_output=True, order=4): ...@@ -35,7 +35,7 @@ def main(write_output=True, order=4):
cl_ctx = cl.create_some_context() cl_ctx = cl.create_some_context()
queue = cl.CommandQueue(cl_ctx) queue = cl.CommandQueue(cl_ctx)
dims = 3 dims = 2
from meshmode.mesh.generation import generate_regular_rect_mesh from meshmode.mesh.generation import generate_regular_rect_mesh
mesh = generate_regular_rect_mesh( mesh = generate_regular_rect_mesh(
a=(-0.5,)*dims, a=(-0.5,)*dims,
...@@ -90,7 +90,7 @@ def main(write_output=True, order=4): ...@@ -90,7 +90,7 @@ def main(write_output=True, order=4):
dt_stepper = set_up_rk4("w", dt, fields, rhs) dt_stepper = set_up_rk4("w", dt, fields, rhs)
final_t = 10 final_t = 1
nsteps = int(final_t/dt) nsteps = int(final_t/dt)
print("dt=%g nsteps=%d" % (dt, nsteps)) print("dt=%g nsteps=%d" % (dt, nsteps))
...@@ -113,7 +113,7 @@ def main(write_output=True, order=4): ...@@ -113,7 +113,7 @@ def main(write_output=True, order=4):
print(step, event.t, norm(queue, u=event.state_component[0]), print(step, event.t, norm(queue, u=event.state_component[0]),
time()-t_last_step) time()-t_last_step)
if step % 10 == 0: if step % 10 == 0:
vis.write_vtk_file("fld-%04d.vtu" % step, vis.write_vtk_file("fld-var-propogation-speed-%04d.vtu" % step,
[ [
("u", event.state_component[0]), ("u", event.state_component[0]),
("v", event.state_component[1:]), ("v", event.state_component[1:]),
......
...@@ -113,7 +113,7 @@ def main(write_output=True, order=4): ...@@ -113,7 +113,7 @@ def main(write_output=True, order=4):
print(step, event.t, norm(queue, u=event.state_component[0]), print(step, event.t, norm(queue, u=event.state_component[0]),
time()-t_last_step) time()-t_last_step)
if step % 10 == 0: if step % 10 == 0:
vis.write_vtk_file("fld-%04d.vtu" % step, vis.write_vtk_file("fld-wave-min-%04d.vtu" % step,
[ [
("u", event.state_component[0]), ("u", event.state_component[0]),
("v", event.state_component[1:]), ("v", event.state_component[1:]),
......
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