If we didn't do this, then the CSE generator would have to anticipate
that the CSE compute instruction would need to depend on more inames
(those unused hw axes) than actually declared--because previously
innocuous-seeming inames could suddenly turn out to be hardware axes.

'SequentialTag' was the wrong idea, it impeded sequential unroll.
Restrict-to-sequential and tagging have nothing to do with each other.
This is now realized in the code.

In particular, just touching a variable written to by a non-idempotent
instruction makes that instruction also not idempotent.